TBNQuantum
Below-threshold execution of fault-tolerant ripple-carry addition on a trapped-ion quantum computer
Publication: quant-ph updates on arXiv.org
Author: Jacob S. Nelson, Andrew J. Landahl, Andrew D. Baczewski
Source published: 14/10/2026, 04:00:00 UTC
Briefing created: 25/10/2026, 20:03:59 UTC
Based on a feed excerpt; full article content has not been acquired. Source evidence retrieved 14/10/2026, 12:17:26 UTC.
Briefings
Researchers deployed a fault-tolerant quantum architecture on Quantinuum's Helios-1 trapped-ion computer to test ripple-carry addition circuits for inputs up to five bits. The study observed only one logical failure in one-bit addition after filtering burst errors, resulting in an estimated failure rate of (6.0 ± 5.9) × 10⁻⁵. This performance is significantly better than the unencoded hardware failure probability of (3.5 ± 1.3) × 10⁻³, with two- and three-bit adders also showing improvements. The experiment utilized error-detecting [8,3,2] and [4,2,2] codes to increase effective fault distance from two to four.
Key points
- The experiment successfully executed ripple-carry adder circuits for classical inputs up to five bits on Quantinuum's Helios-1 trapped-ion quantum computer.
- The estimated logical failure rate for one-bit addition was (6.0 ± 5.9) × 10⁻⁵, which is substantially lower than the unencoded hardware failure probability of (3.5 ± 1.3) × 10⁻³.
Context
This research demonstrates that fault-tolerant quantum computing architectures can achieve significantly lower error rates than their unencoded counterparts, validating the feasibility of universal fault-tolerant quantum computing on trapped-ion platforms.
Limitations
The study covers only one-bit addition circuits; two- and three-bit adders showed improvements but did not reach the threshold performance of longer adders. The reported failure rate includes burst-error filtering and represents a single logical failure observed during the experiment.
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