Quantum

Quantinuum Processors Stand Out in Study of Quantum Error-Correction Operations

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Based on a feed excerpt; full article content has not been acquired. Source evidence retrieved 08/10/2026, 14:19:25 UTC.

Briefings

A study published on arXiv evaluated Quantum Error Correction (QEC) operations using ten processors from Quantinuum, IBM, and IQM. Quantinuum's Helios-1 processor demonstrated superior performance in tests involving up to 91 data qubits, maintaining meaningful results across three distinct error-correction code families. The benchmark highlighted that running parallel operations improved performance, though larger scale tests revealed scheduling limits due to processor constraints. The study proposes a simplified method to assess hardware readiness before full QEC experiments, though reliability across larger systems remains unproven.

Key points

• Quantinuum's Helios-1 processor maintained meaningful results across three error-correction code families, including a 91-data-qubit test, with performance improvements linked to parallel operation execution.
• Quantinuum's processors showed significantly lower additional error rates during QEC operations compared to IBM's Phoenix processor, which exhibited higher measurement-induced errors.

Context and limitations

The study's reliability across larger systems remains unproven due to limited testing on larger scales. The benchmark's effectiveness for evaluating hardware improvements is not yet established, and the study does not demonstrate successful error correction at the tested 91-qubit scale.

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